ECE 690: Computer Systems Architecture
Spring 2005

Instructor: Jie Hu
Office: 331 ECEC
Email: jie.hu@njit.edu
Office Hourse: T 10:00AM - 11:00AM, W 4:00PM - 5:00PM
Office Phone: 973-596-5273

Prerequisites: ECE 684 and CoE 353 or CIS 650
Textbook: Computer Architecture: A Quantitative Approach, by John L. Hennessy & David A. Patterson, Morgan Kaufmann, 3rd Edition, 2003
References: Parallel Computer Architecture : A Hardware/Software Approach, by David E. Culler, Jaswinder Pal Singh, Anoop Gupta, Morgan Kaufmann Publishers

Meeting Time & Place: R 6:00Pm - 9:00Pm, FMH 408
Course Homepage: http://web.njit.edu/~jhu/ece690

Course Description
Discusses advanced topics in modern computer systems architecture such as pipelined and superscalar processors, parallel computers (vector, SIMD, MIMD), multithreaded and dataflow architectures, cache and memory hierarchy, and system interconnect architectures. Also discusses relevant system software design issues such as shared memory and message-passing communication models, cache coherence and synchronization mechanisms, latency-hiding techniques, virtual memory management, program

Course Outline (subject to change)

• Review of pipelining, technology trends, performance, cost, and benchmarking
• Instruction set architecture: MIPS, DSP, Media
• Caches and memory systems
• Storage systems: storage devices, fault-tolerance, queuing, performance
• Instruction level parallelism: dynamic (hardware) approach vs. static (software) approach
• Exploiting thread-level parallelism via multithreading architectures
• Multiprocessor architectures

Grading Policy:

• Midterm Exam: 35%
• Final Exam: 35%
• Project: 30%