Subject 1 (Chapter 1)


 Typo:       Somewhere in Slide 59, i write  Cx(flagspace)  to be included
             in Actual cach size.
 Correction:  C x A x flagspace 
 
 Naturally one could also combine the last two of the three terms so that

 Actual cache size is   C x K x A  + C x A x (tag-space + flag-space)
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 I mentioned in class that  C, K must be powers of 2 if only because
  lgC and lgK  are expected to be integer (see slide 61).

 But there is no immediate need for A to be a power of A. Most designs
 have an A which is 2, 4, or 8. However Intel is utilizing in Intel L3 caches an
 A equal to an 11!


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Last Update Wed 18 September, 2019 @ 12:08