Tuesdays |
1:00 - 3:10 |
Thursdays |
1:00 - 3:10 |
Tuesday 3:30 – 6:00
973-596-3000 (Day classes by 6 A.M., evening classes by 2 P.M)
Text: Kleitz, Wm., Digital
Electronics: A Practical Approach, Pearson Prentice Hall, latest ed.
Course Objectives
Grading (You cannot
pass the course if you having failing grades tests average and final exam):
Homework |
10 % |
Tests |
25 % |
Laboratory Work |
25 % |
Final Exam |
30 % |
Professional Society Meeting attendance |
10 % |
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Notes: (1) NJIT Honor Code will be
strictly followed in all courses.
(2) Any revisions to syllabi
during the semester will be made in consultation with students.
Week |
Date |
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Topics & Activities |
Homework & Project due date s |
1 |
1/22 |
Appendix F |
Electric Circuit Theory
Review |
#1 Instructor assigned problems & p.
885:1-10, p. 886: 1-4 |
2 |
1/29 |
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Digital and Analog, Number
Systems |
#2 |
3 |
2/5 |
2.1- 2.5 3.1 – 3.7 |
Digital Signals, Serial
and Parallel Transmission, AND, OR, NOT gates, ICs |
#3 |
4 |
2/12 |
3.8 – 3.10 |
NAND, NOR, ICs,
Troubleshooting |
#4 Ch. 3: 30,
31, 34,35, 41-43, 48,53, 54 |
5 |
2/19 |
5.1 – 5.4 |
Combinational Logic,
Boolean Laws and Algebra, DeMorgan’s Theorem |
#5 Ch. 5: 1-9, 17, 19, 21, 22, 24, 29 |
6 |
2/26 |
5.5 – 5.8 |
NAND/NOR Universality,
POS, SOP, K-maps |
#6 Ch. 5: 31-35, 37-39, 41, 44,
45 |
7 |
3/5 |
6.1 – 6.5 |
XOR, XNOR, Parity
Circuits, Controlled Inverters |
#7 Ch. 6: 1-7, 9, 10, 15, 16 |
8 |
3/12 |
7.1 – 7.9 |
Binary Addition and
Subtraction, Two’s Complement System and Arithmetic, BCD Arithmetic, Half and
Full Adders, Adder ICs, Adder/Subtractor, ALU |
#8 Ch. 7: 1,2, 6-9, 11(a-d), 12(e-h), 15, 20,
24, 30 |
9 |
3/26 |
8.1 – 8.7 |
Comparators,
Decoding/Encoding, Code Converters, MUXs, DeMUXs, Analog MUX/DeMUX, System
Design |
#9
Ch. 8: 3, 5-9, 11, 13, 15, 20, 40 |
10 |
4/1 |
Chapter 10 |
Sequential Logic;
Registers; SR Latch; D, JK, T Flip Flops; MS and Edge Triggering; IC Flip
Flops; Octal FF chip; FF Function Tables |
#10 Ch. 10: 1-4,8, 10-15, 18, 22, 23, 25,
27-32, 35, 37 |
11 |
4/8 |
12.1 – 12.8 |
Sequential Circuit
Analysis, Ripple Counters, Modulus, Divide-by-n Counters, Synchronous Counters |
#11 Ch. 12: 1, 2, 5-8, 11, 13, 15, 17, 26, 30, 31, 36, 39 |
12 |
4/15 |
2.6-2.8, 2.11-2.12 |
Relays, Diodes, Transistor
as a Switch, TTL and CMOS, DIP and SMD |
#12 5-7, 110, 19,21,22 |
13 |
4/22 |
9.1 – 9.5, 9.8 11.1 – 11.6 |
TTL Family, Totem Pole and
Open Collector Outputs, CMOS Family, Interfacing Logic Families, Auto Delay
Gate, Auto Reset Circuit, Schmitt Trigger, Debouncing, Pull-up Resistors, |
#13 Ch. 11: 1,3 |
14 |
4/29 |
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Review or PLDs (Chapter 4) |
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Week |
Date |
Lab Number |
Topics |
Report |
1,2 |
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1 |
Basic dc Circuits and
Equipment Usage |
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3 |
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4 |
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5 |
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6 |
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7 |
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8 |
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9 |
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10 |
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11 |
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12 |
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13,14 |
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