This applet simulates 2-, 3- and 4-input programmable logic devices, or PLDs. A PLD is an integrated circuit chip containing one or more arrays of AND and OR gates. The user first selects the number of inputs and outputs to the array. Then the user makes connections to the inputs of the gates within the chip to realize the desired logic functions.
See Chapter 1 of Computer Systems Organization and Architecture for additional information on programmable logic devices.
Main Interface: