The current research topics are in the area of Reliability of High-K
Dielectrics in nanoscale CMOS Devices on silicon or on high-mobility substrates. The Processing conditions of various High-K dielectrics like HfZrO or HfAlO varied to bring the EOT below 0.7 nm. The work involves extensive device characterization such as stress-induced threshold voltage shifts, NBTI, PBTI, SILC, TZDB, TDDB, interface states and low temperature characterization.
Defect Characterization of Thin-film (CdTe) and Silicon Solar Cells is also part of our group's research.
The VLSI Design research includes (i) A 256-Channel Correlator Design for Charge-Pump Detector (ii) A Synthesizable VHDL Model for Three Dimensional Hyperbolic Positioning System using GPS; (iii) On-Chip Implementation of Deadlock Avoidance in Wormhole Networks; and Transceiver design for sensors network.
The other current topic is characterization and modeling of Three N-Type Implant Pinned Buried Photodetector using Charge Transfer Model for Ultra High Frame Rate Burst Image Sensors.
Remote monitoring of chemical sensors using local transceivers.