Primary text: Richard C. Jaeger, "Microelectronic Circuit Design"
McGraw Hill, 1996

Reference text: Sedra/Smith: Circuits, 3^rd Ed’n, Saunders College Publishing

Lecture                            TOPIC                                                    TEXT

1-2    INTRODUCTION TO ELECTRONICS.                     Chapt.I    pp 9-18

Ideal voltage & current sources, D/A & A/D conversion, notational conventions, current & voltage division, Thevenin & Norton circuits.

 

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2-3  SOLID-STATE ELECTRONICS                                      Chapt. II  pp 25-42

Holes and electrons in silicon, the energy level diagram, Fermi level, electron and hole mobility, donor and acceptor doping, mobility and resistivity in doped materials, drift and diffusion currents.

 

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4-9    SOLID-STATE DIODES & DIODE CIRCUITS              Chapt. III   pp 47-103

The pn junction, depletion region, energy barrier, diode equation, Zener diode, junction capacitance, diode circuit analysis - the load-line concept, iterative solution to diode circuits, "ideal" & "constant-voltage drop" models, multiple diode circuits, Zener voltage regulator circuit, rectifier circuits, clipping circuits.

10-16  FIELD EFFECT TRANSISTORS                             Chapt. IV pp  116-148

The MOS capacitor, inversion layer, MOSFET structure, enhancement and depletion mode device, linear region, saturation effects, channel-length modulation, body effect, transfer characteristics, biasing circuits, effects on load lines of changes in biasing circuits, bias stability.

 

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17  INTRODUCTION TO DIGITAL ELECTRONICS         Chapt. IV pp  226-236

Definition of logic levels, noise margins, rise and fall times, propagation delay. OR, AND, NOR and NAND gates.

 

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18-21 MOS LOGIC DESIGN                                                 Chapt. VII  pp  243-271

Resistive load inverter and noise margin analysis. Graphical analysis of saturated load inverter. Depletion-mode load inverter with noise margin analysis. NMOS logic gates.

 

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22-24 CMOS LOGIC DESIGN                                                 Chapt. VIII  pp 305-326

CMOS inverter, voltage transfer characteristics, noise margin analysis, dynamic behavior, CMOS NOR and NAND gates, CMOS transmission gate.

 

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25,26 MOS MEMORY CELLS                                                  Chapt. IX  pp  338-356

Latch, 6-T static memory cell, 1-T dynamic memory cell, sense amplifier.

 

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27,28 OPERATIONAL AMPLIFIERS                                         Chapt. XII  pp  488-500

Ideal Op Amp, inverting and noninverting and buffer amplifiers. Difference and instrumentation amplifier.

Peter E. Engler   September 1998.           Classes                       Top