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ECE495 Computer Engineering Design Laboratory

Experiment 4

Simple CPU Design

Objectives

The objective of this experiment is to design and implement a simple CPU using the ALTERA EPM series high-density programmable logic devices. A VHDL program based on a behavioral description will be developed to model the CPU

Preparation

Review Chapter 6 of Computer Systems Organization & Architecture by John Carpinelli.

Equipment Needed

• ALTERA UP1 board

• One 2816 EEPROM

• Signal generator for clock

References

• John D. Carpinelli, Computer Organization & architecture, Addison Wesley, 2001.

• Morris Mano, Computer Engineering, Hardware Design, Addison Wesley.

Background

In this experiment, you will design a simple CPU based on the ALTERA EPM 7128S PLD. The EEPROM will be used as both program memory and data memory. A VHDL program based on a behavioral approach will be developed to model the CPU. The design must fit the EPM 7128S device and the content of the accumulator should be displayed.

CPU Specifications

The CPU must meet the following specifications.

• The CPU must be able to access 64 8-bit words of memory. This implies that a 6-bit Address Register (AR) and a 6-bit Program Counter (PC) are needed.

• The CPU must be able to access the 8-bit memory via an 8-bit Data Register (DR).

• The CPU must have an 8-bit accumulator (AC)

• The CPU may include additional internal components, such as an instruction register, depending on each student's design. However, the entire design, including control logic, must fit on a single EPM7128S.

• The CPU must be capable of fetching, decoding and executing the instructions shown in Table 4.1. In this table, AAAAAA specifies a 6-bit address.

• The CPU must be able to successfully read instructions and data from memory.

Table 4.1:CPU instruction set.

Prelab Assignment

1.      Prepare a preliminary design for your CPU. Include a commented .VHD file.

2.      Prepare a .SCF file to simulate your design.

3.      Prepare the program needed to store into the EEPROM to test the CPU.

Lab Assignment

Develop VHDL code using a behavioral approach for the CPU described above. Program, debug and test your design. For final demonstration, your CPU should be able to run a test program and display the result of A.

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