ROBUST INTERPROCESSOR CONNECTIONS FOR VERY-HIGH PERFORMANCE

Sotirios G. Ziavras and Qian Wang

ABSTRACT, AMS99

The development of very high-performance scalable computers with hundreds or thousands of processors is absolutely essential for many computation problems, such as weather modelling and simulations in fluid dynamics or aerodynamics. Several interconnection networks have been proposed for parallel computers. Nevertheless, many of them are plagued by poor topological properties and/or prohibitively high VLSI (e.g., wiring) complexity. Based on these observations, we  propose a new class of processor interconnections, namely HOWs (architectures with Highly-Overlapping Windows), which   are highly scalable and have relatively low wiring complexity. Many members of this class can be implemented effectively with current and expected technologies. Feasibility and comparative analyses involving implementation issues are also included here. In addition,  we present novel embeddings of various classical  interconnection networks into 1-D and 2-D HOW systems.  We demonstrate that 2-D HOWs are not only scalable and often feasible to implement, but they also result in very good embeddings of several classical topologies.


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