HYBRID MESSAGE-PASSING/SHARED-MEMORY ARCHITECTURES FOR VERSATILE PARALLEL COMPUTERS

Sotirios G. Ziavras

The main objective of this project (joint work) is to demonstrate that parallel computers with hybrid message-passing/shared-memory architecture are more powerful than parallel computers that implement only one of the two parallel processing paradigms (i.e., either message-passing or shared-memory). The importance of this project is centered on the fact that existing parallel computers either support only one of these two paradigms or have distributed shared memory (i.e., an inherently message-passing architecture that also supports shared memory through primarily inefficient software means).

 The first objective of this project was to design and build a hypercube parallel computer with up to 64 digital signal processors (DSP); in addition, shared memory should be implemented through hardware means. The very impressive TMS320C40 DSP was chosen for the development of our TurboNet system (with NSF seed money). This processor possesses very powerful parallel processing capabilities. The current version of the TurboNet system contains eight DSPs. Low-level image processing algorithms, such as convolution, matrix multiplication, fast Fourier transform, and image segmentation have already been developed. The development of other application algorithms is already under way.

 The results prove that the hybrid architecture of TurboNet introduces flexibility that can very easily be taken advantage of in order to speed up the execution of parallel programs. Therefore, it can be concluded that hybrid message-passing/shared-memory architectures should be chosen for the design of versatile parallel computers.

* Return to the "summary of recent research contributions" page

* Return to my home page

Last updated 11/02/98, SGZ