A SCALABLE/FEASIBLE PARALLEL COMPUTER IMPLEMENTING ELECTRONIC AND OPTICAL INTERCONNECTIONS FOR 156 TeraOPS MINIMUM PERFORMANCE

Sotirios G. Ziavras, Haim Grebel, and Anthony T. Chronopoulos

ABSTRACT, PAWS'96

 The main objective of this project is to develop a ``point design'' for an advanced MIMD computer system capable of achieving at least 100 TeraOPS performance with technology that will definitely become feasible in less than a decade. The project comprises the following major tasks: design of a scalable, massively parallel computer architecture involving advanced, but at the same time readily available, electronic and optical components; feasibility analysis of the design; evaluation of the system's communication structure through theory and simulations; paper design for an associated programming environment, including efficient mapping techniques for program development in a manner transparent to the underlying architecture; performance evaluation of the proposed system based on well-defined benchmarks; further performance analysis through simulation of significant applications, primarily from the physics and computer vision fields, which are characterized by heavy computation and communication requirements; and a study of the system's usability by illustrating that it satisfies the performance requirements for a wide range of diverse applications. Scalability of the proposed computer system guarantees a lifetime extending well into the next century. Our design takes advantage of free-space optical technologies to produce a one-dimensional building block (BB) that implements efficiently a large, almost fully-connected system of processors. It is our vision that designing almost fully-connected large systems of electronic processors will be the most immediate impact of optics on the very demanding massively parallel processing field. Whereas such optical systems will be feasible in the near future, in contrast the very large wiring complexity of electronic fully-connected systems prohibits their implementation. In addition to having a scalable architecture, our BB is also technology scalable, and therefore the number of contained processors in the BB could increase dramatically with expected improvements in optical technologies. A simple two-dimensional structure is proposed for the complete system, where the aforementioned one-dimensional BB is extended into two dimensions. With readily available technology, the word-wide optical interconnection network can be viewed as a mesh of relatively short plastic bars to which interfaces to processor cards are attached. Each processor card contains eight processors interconnected locally with an electronic crossbar. Taking advantage of higher-speed optical technologies, all eight processors share the same optical interface to the optical medium. Even though our investigation will be carried out for a two-dimensional system, its high-level architecture is also scalable because it can be extended straightforwardly for any number of dimensions larger than two. In general, our multidimensional architecture can emulate quite efficiently a multidimensional generalized hypercube, which is characterized by outstanding performance and extremely high wiring complexity that prohibits its electronic implementation. Consistency of communications capabilities throughout the entire system also supports ease of mapping application tasks to the system. The proposed system can implement both fundamental communication paradigms, i.e., message passing and shared memory, through the incorporation of distributed shared-memory. This approach benefits further ease of algorithm development and yields better performance. This conservative design is expected to have a tremendous, positive impact on massively parallel computing in the very near future. 


* Return to the "selected publications" page

* Return to my home page


Last updated 11/02/98, SGZ