Project

An experimental study was conducted to examine the effect of reverse biased floating voltage at source and drain junctions during high field electron injection on the performance of NMOSFETs. This high field-stressing situation might occur in plasma processing where the reverse biased floating voltage developed at the source and drain junctions of a transistor could have severe consequences on the performance of devices. The plasma potential distribution at the surface of wafer during plasma processing gives rise to high field electron injection. The high field electron injection process could be gate injection or substrate injection depending upon the polarity of plasma potential relative to the wafer. The effect of floating voltage at source and drain junction of NMOSFET is to reduce the channel length by Debye shielding effect at source and drain. This reduction in channel length effectively increases the stress current density in the gate oxide, which is believed to be the cause of modified device characteristics.