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COE498 Advanced Computer System Design Lab

Chapter 3

Experiment 3

The BLITZEN Massively Parallel Computer

 

3.1   Objective

BLITZEN is a massively parallel computer (i.e., it contains hundreds or thousands of processors) that was designed for NASA in 1987 by a team consisting of D.W. Blevins (Microelectronics Center of North Carolina - MCNC), E.W. Davis (North Carolina State University), R.A. Heaton (MCNC), and J.H. Reif (Duke University). An MS-DOS, PC-based software simulator of BLITZEN will be used in this experiment for the development of various parallel algorithms. This simulator is an adaptation of a UNIX-based simulator that was created by the aforementioned team. The first version of the PC-based simulator was developed by Mr. J.A. Hosty for Professor Ziavras, as the requirement for a Master's Project at NJIT; version 2.0 of the Borland Turbo C compiler is required. An enhanced version of the simulator is compatible with newer versions of Borland C compilers; the enhancements were incorporated by Mr. N. Patel.

 

3.2   What You Need

 

3.3   Introduction

BLITZEN is an SIMD (Single-Instruction stream, Multiple-Data stream) massively parallel computer with thousands of small processing elements (PEs) interconnected by a routing network; a PE comprises a processor and local memory. In an SIMD parallel computer all PEs execute at any time the same instruction broadcast to them by a control unit (i.e., a front-end machine). The front-end machine decodes instructions and sends the appropriate control signals to all PEs, but each PE is working on its own, local data.

The PEs in BLITZEN contain bit-serial processors. More specifically, each processor consists of a 1-bit ALU, many 1-bit registers, two control registers, and a long shift register. The local memory of each PE is 1 Kbits.

A 2-dimensional X grid is employed in BLITZEN for inter-PE data transfers. This interconnection network implements connections with the 8 neighbors of each PE. It can connect a PE to its neighbors in the directions: North, South, East, West, Northeast, Southeast, Northwest, and Southwest.

The local memory of each PE is also connected to a 4-bit bus shared by a group of 16 PEs. The 4-bit bus is attached to an external VRAM (video RAM) memory.

A description of BLITZEN can be found in the Appendix.

 

3.4   PC-BASED BLITZEN Simulator

The MS-DOS PC-based BLITZEN simulator is set up for a maximum of 32 x 32 PEs. Compared to Blitzen, the simulator has the following restrictions and additions:

The control bar is to activate the actions: run, single step, break, peek, halt and exit.

The user code must be written in Turbo C2.0. Instructions on how to compile and run your code appear on page 19 of the simulator manual. The simulator manual is included in the Appendix.

 

3.5   Experiment

Develop code for BLITZEN that uses a 32 x 32 array of PEs to find the maximum and minimum of 4-bit unsigned elements, stored four elements per PE. Also, develop code to find the total number of elements with value larger than 9. The results should be broadcast at the end to all PEs. The elements are initially loaded into the PEs from a VRAM file given to you separately.

Provide a flowchart for each of your algorithms. Develop BLITZEN code for their implementation. Use the BLITZEN simulator to run the code. Show some intermediate as well as final results.

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