My research interests concentrate in two main areas: engineering education research and interconnection networks/multiprocessor systems.

Engineering Education Research

My work in engineering education research encompasses several facets. As past member of the Governing Board of the Gateway Engineering Education Coalition, I supervised a wide variety of projects involving many faculty members at NJIT and served as project leader for several more. With my students, I have also created several Java applets for computer architecture education. (Click on the Applets tab above to see a few of these applets.) Please see my curriculum vitae (click on the CV link above) for a list of my publications and grants in this area.

Interconnection Networks/Multiprocessor Systems

My work in this area focuses on multistage interconnection networks, such as Clos and Benes networks, and their role in multiprocessor systems and telecommunication systems. My research focuses on network design and performance, routing algorithms, and incorporation of fault tolerance in both switching hardware and software. Please see my curriculum vitae (click on the CV link above) to see a list of my publications and grants in this area.