|
|
COE485 Computer Engineering Design Laboratory
Experiment 3
T-Bird Turn Signal
The objective of this experiment is to familiarize the student with the ALTERA UP1 board, the EPM7128 PLD and VHDL.
Review Chapter 2 of Computer Systems Organization & Architecture by John John Carpinelli.
In this experiment, we will implement the turn signal control of a Thunderbird (T-bird) car using VHDL and the ALTERA EPM7128S PLD. The left and right turn signals of the T-bird each contains 3 lights. There are three binary inputs to the control, LEFT, RIGHT, and HAZARD. When LEFT = 1 or RIGHT = 1, the lights flash according to the patterns shown in Figure 3.1. Note that LEFT and RIGHT cannot be 1 at the same time and if the switch from LEFT =1 to RIGHT = 1 or RIGHT = 1 to LEFT = 1 occurs in middle of a flashing sequence, the control should starts the new sequence from the beginning. In addition, the HAZARD takes precedence over LEFT and RIGHT. When HAZARD = 1, all six lights will flash on and off.
|
|
| Figure 3.1: T-bird turn signal patterns. |
This T-bird turn signal control can be implemented with a Moore machine using eight states. You can use the 7-segment digits on the UP1 board as the turn signal display. The time between flashing of the lights should be about 1 second for the left and right turn signals, and 0.5 second for the hazard signal. The system clock on the UP1 board runs at about 25 MHz, you may need to delay the transitions between states to achieve the proper display.
1. Prepare the state diagram and state transition table for the T-bird turn signal control.
2. Prepare a preliminary VHDL program for your design.
3. Prepare a .VEC file with which to simulate your design for the EPM7128S.
Build, test, simulate and debug your design until it works.
|
|
