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EE395 -  Microprocessor Laboratory

Computer Construction Project and Experiments

Experiment 4 — The SBC Used to Simulate D and J-K flip-flops

The SBC will be used to simulate a D type flip-flop. The inputs are D and CLOCK and the outputs are Q and . The input should be read when CLOCK is high and should be transferred to the output when the CLOCK signal drops low. The software should be written to guarantee that no false triggering can take place due to a sudden noise spike.

Repeat the above experiment for a J-K type flip flop.